On the optimization of lateral pnp BJTs found in BiCMOS process technologies

Author

Zhao, Enhai ; El-diwany, Monir ; Cressler, John D. ; Shibley, James ; Sadovnikov, Alexei ; Kocoski, Dimitar ; Krakowski, Tracey L.

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

fYear

2005

fDate

9-11 Oct. 2005

Firstpage

216

Lastpage

219

Abstract

We present a comprehensive investigation aimed at optimizing the performance of lateral pnp BJTs found in BiCMOS technologies to a level suitable for analog, IF/RF circuit applications. Alternative base profiles, LDD implantations conditions, and device geometries are quantitatively assessed, as well as the path of adapting low-voltage (LV) pMOS vs. high-voltage (HV) pMOS device design points for viable lateral pnp BJTs. The resultant dc, ac and low-frequency noise characteristics are addressed.

Keywords

BiCMOS integrated circuits; bipolar transistors; BiCMOS process technologies; ac characteristics; base profiles; dc characteristics; device geometries; lateral pnp bipolar junction transistor; low-frequency noise characteristics; pMOS device design; Analog computers; BiCMOS integrated circuits; CMOS technology; Circuit noise; Degradation; Design optimization; Drives; Low-frequency noise; Rail to rail amplifiers; Semiconductor device noise;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar/BiCMOS Circuits and Technology Meeting, 2005. Proceedings of the

Print_ISBN

0-7803-9309-0

Type

conf

DOI

10.1109/BIPOL.2005.1555235

Filename

1555235