Substrate bias effects in vertical SiGe HBTs fabricated on CMOS-compatible thin film SOI

Author

Chen, Tianbing ; Bellini, Marco ; Zhao, Enhai ; Comeau, Jonathan P. ; Sutton, Akil K. ; Grens, Curtis M. ; Cressler, John D. ; Cai, Jin ; Ning, Tak H.

Author_Institution

Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA

fYear

2005

fDate

9-11 Oct. 2005

Firstpage

256

Lastpage

259

Abstract

A comprehensive investigation of substrate bias effects on device performance, thermal properties, and reliability of vertical SiGe HBTs fabricated on CMOS-compatible, thin-film SOI, is presented for the first time. Calibrated 2D MEDICI simulations are used to support our explanations, and the resultant device design trade-offs encountered in building SiGe HBTs on thin-film SOI are quantitatively assessed.

Keywords

CMOS integrated circuits; Ge-Si alloys; heterojunction bipolar transistors; semiconductor device models; semiconductor device reliability; silicon-on-insulator; 2D MEDICI simulations; CMOS-compatible thin film SOI; SiGe; device performance; silicon-on-insulator; substrate bias effects; thermal properties; vertical heterojunction bipolar transistor; BiCMOS integrated circuits; CMOS technology; Germanium silicon alloys; Heterojunction bipolar transistors; Immune system; MOSFETs; Silicon germanium; Silicon on insulator technology; Substrates; Thin film devices;

fLanguage

English

Publisher

ieee

Conference_Titel

Bipolar/BiCMOS Circuits and Technology Meeting, 2005. Proceedings of the

Print_ISBN

0-7803-9309-0

Type

conf

DOI

10.1109/BIPOL.2005.1555245

Filename

1555245