Title :
Quaternary logic for carry-lookahead binary addition
Author :
Manzoul, M.A. ; Bommireddy, Amalkiran
Author_Institution :
Dept. of Electr. Eng., Southern Illinois Univ., Carbondale, IL, USA
Abstract :
The role of the quaternary (four-valued) logic in speeding up the binary addition is discussed. An improved carry-lookahead adder circuit, which is completely realizable by binary gates, is presented. The speed of the proposed n-bit adder is compared to the traditional carry-lookahead n-bit adder in terms of gate delays and fan-in. Results show that the proposed adder is faster in certain ranges determined by n. For an 8-bit adder, the circuit can save 37.5% of the traditional circuit time (in gate delays).<>
Keywords :
adders; many-valued logics; 8 bit; adder; binary gates; carry-lookahead binary addition; gate delays; quaternary logic; Adders; Arithmetic; Delay effects; Equations; Logic circuits; Logic gates; Propagation delay; Signal generators;
Conference_Titel :
Multiple-Valued Logic, 1988., Proceedings of the Eighteenth International Symposium on
Conference_Location :
Palma de Mallorca, Spain
Print_ISBN :
0-8186-0859-5
DOI :
10.1109/ISMVL.1988.5186
