DocumentCode :
2735729
Title :
The Study Of Improved RWPA For The Multiple-Core Chip
Author :
Xing, Cao ; Jinyi, Zhang ; Xiaojun, Ren
Author_Institution :
Micro-Electron. Res. & Design Center, Shanghai Univ.
fYear :
2005
fDate :
27-29 June 2005
Firstpage :
1
Lastpage :
4
Abstract :
Along with the development of the multi-core system, the testability of circuit faces many new challenges. Relay wave propagation test of arrays (RWPA) has many advantages in single-chain and multi-chain boundary scan (BS) circuit. In this paper, the improved single-chain RWPA is tentatively applied to the multi-core BS architecture, to reduce the test time and increase the fault coverage. As an experiment, it is applied to the BS circuit of VAD-SOC which has multiple cores in the system for verifying the advantages of this scheme
Keywords :
boundary scan testing; design for testability; integrated circuit testing; system-on-chip; RWPA; VAD-SOC; circuit testability; fault coverage; multichain boundary scan circuit; multicore system; multiple-core chip; relay wave propagation test of arrays; single-chain boundary scan circuit; Circuit faults; Circuit testing; Controllability; Design for testability; Integrated circuit testing; Multiplexing; Pins; Registers; Relays; System testing; BS; RWPA; multi-core;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Density Microsystem Design and Packaging and Component Failure Analysis, 2005 Conference on
Conference_Location :
Shanghai
Print_ISBN :
0-7803-9292-2
Electronic_ISBN :
0-7803-9293-0
Type :
conf
DOI :
10.1109/HDP.2005.251367
Filename :
4017508
Link To Document :
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