Title :
The Power Conscious Synergistic Processor Element of a Cell Processor
Author :
Takahashi, Osamu ; Cottier, Scott ; Dhong, Sang H. ; Flachs, Brian ; Hirairi, Koji ; Hofstee, H. Peter ; Michael, Brad ; Noro, Hiromi ; Wendel, Dieter ; White, Michael
Author_Institution :
IBM Syst., Austin, TX
Abstract :
A 4-way SIMD streaming processor of a cell processor is developed in a 90nm SOI technology. CMOS static gates implement the majority of the logic. Dynamic circuits are used in critical areas, occupying 19% of the non-SRAM area. ISA, microarchitecture, and physical implementation are co-optimized to achieve a compact and power efficient design
Keywords :
CMOS logic circuits; microprocessor chips; parallel processing; silicon-on-insulator; 90 nm; CMOS static gates; ISA; SIMD streaming processor; SOI technology; SRAM; cell processor; microarchitecture; power conscious synergistic processor element; CMOS logic circuits; CMOS technology; Clocks; Delay; Design optimization; Latches; Logic testing; Programmable logic arrays; Threshold voltage; Timing;
Conference_Titel :
Asian Solid-State Circuits Conference, 2005
Conference_Location :
Hsinchu
Print_ISBN :
0-7803-9163-2
Electronic_ISBN :
0-7803-9163-2
DOI :
10.1109/ASSCC.2005.251779
