• DocumentCode
    2735984
  • Title

    A Sub-1V CMOS 2.5Gb/s Serial Link Transceiver Using 2X Oversampling

  • Author

    Hung, Chih-Chien ; Chiang, Ming-Cheng ; Lee, An-Ming ; Lee, Sheng-Chou

  • Author_Institution
    Realtek Semicond., Hsinchu
  • fYear
    2005
  • fDate
    1-3 Nov. 2005
  • Firstpage
    37
  • Lastpage
    40
  • Abstract
    This paper presents the design of a 2.5Gb/s serial link transceiver with a power consumption of 70mW. With IV supply voltage, the transceiver achieves the bit error rate of 10-14. A supply regulated PLL is shared by the transmitter and the receiver to facilitate the low-power and low-voltage design. The output jitter of the transmitter is 53.9ps peak-to-peak and the chip area is approximately 0.54 mm2
  • Keywords
    CMOS integrated circuits; error statistics; low-power electronics; power consumption; transceivers; 1 V; 2.5 Gbit/s; 70 mW; CMOS; PLL; bit error rate; power consumption; serial link transceiver; Bit rate; CMOS technology; Clocks; Energy consumption; Jitter; Phase locked loops; Switches; Transceivers; Transmitters; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Asian Solid-State Circuits Conference, 2005
  • Conference_Location
    Hsinchu
  • Print_ISBN
    0-7803-9162-4
  • Electronic_ISBN
    0-7803-9163-2
  • Type

    conf

  • DOI
    10.1109/ASSCC.2005.251801
  • Filename
    4017525
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2735984