DocumentCode
2736381
Title
Study on Hardware Software partitioning using Immune Algorithm and its Convergence Property
Author
Liu, Yang ; Li, Qing Cheng ; Liu, Jia Xing ; Ma, Jie
Author_Institution
Coll. of Inf. Tech. Sci., Nankai Univ., Tianjin, China
Volume
3
fYear
2009
fDate
20-22 Nov. 2009
Firstpage
4
Lastpage
8
Abstract
Hardware Software partitioning is one of the most significant part of Hardware Software co-design of embedded systems, which is directly related to performance and cost. A lot of works have been done such as the simulated annealing algorithm, greedy algorithm and evaluation algorithm. In this paper, a new hardware software partitioning method based on Immune Algorithm was introduced. The model of the embedded system was constructed by Improved Directed Acyclic Graph (IDAG) to obtain the objective function for hardware/software partitioning. Compared with other algorithm, it could provide an effective tool for measuring the performance of different objective functions, and improve the designing efficiency. Also, a proof was given to show the algorithm had weak convergence in probability.
Keywords
convergence; embedded systems; greedy algorithms; hardware-software codesign; simulated annealing; convergence property; embedded systems; evaluation algorithm; greedy algorithm; hardware software partitioning; immune algorithm; improved directed acyclic graph; simulated annealing algorithm; weak convergence probability; Convergence; Costs; Embedded software; Embedded system; Greedy algorithms; Hardware; Partitioning algorithms; Simulated annealing; Software algorithms; Software performance; Convergence Property; Hardware Software Partitioning; Hardware Software co-design; Immune Algorithm;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent Computing and Intelligent Systems, 2009. ICIS 2009. IEEE International Conference on
Conference_Location
Shanghai
Print_ISBN
978-1-4244-4754-1
Electronic_ISBN
978-1-4244-4738-1
Type
conf
DOI
10.1109/ICICISYS.2009.5358254
Filename
5358254
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