Noise Reduction in LNAs Using a Conductive Path to Ground Technique in SiGe Technology

Author

Alvarado, Javier, Jr. ; Duster, Jon S. ; Kornegay, Kevin T.

Author_Institution

Cornell Univ., Ithaca, NY

fYear

2005

fDate

Nov. 2005

Firstpage

185

Lastpage

188

Abstract

A passive noise suppression technique was implemented on a family of monolithic low-noise amplifiers using a 0.5mum SiGe BiCMOS process with 47GHz f_T transistors. This method provides the entire circuit with a conductive path to ground the P-substrate. Near active device regions, noise injection and crosstalk paths are shunted to ground. This technique decreased the LNAs noise figures by 1.88dB, 0.34dB, and 0.82dB at 5.25GHz, 2.45GHz, and 2.14GHz respectively. While DC power consumption is reduced, the gain improved by 5.3dB and 2.5dB at 5.25GHz and 2.14GHz respectively

Keywords

BiCMOS analogue integrated circuits; Ge-Si alloys; integrated circuit design; low noise amplifiers; millimetre wave amplifiers; 0.34 dB; 0.5 micron; 0.82 dB; 1.88 dB; 2.14 GHz; 2.45 GHz; 2.5 dB; 47 GHz; 5.25 GHz; BiCMOS process; SiGe; conductive path to ground technique; monolithic low noise amplifiers; noise reduction; passive noise suppression; Active noise reduction; BiCMOS integrated circuits; Circuit noise; Crosstalk; Energy consumption; Germanium silicon alloys; Low-noise amplifiers; Noise figure; Noise reduction; Silicon germanium;

fLanguage

English

Publisher

ieee

Conference_Titel

Asian Solid-State Circuits Conference, 2005

Conference_Location

Hsinchu

Print_ISBN

0-7803-9163-2

Electronic_ISBN

0-7803-9163-2

Type

conf

DOI

10.1109/ASSCC.2005.251696

Filename

4017562