Title :
Specifications of a knowledge-based environment for VLSI system architectural design
Author :
Bourbakis, N.G. ; Savvides, I.N.
Author_Institution :
Dept. of Electr. & Comput. Eng., George Mason Univ., Fairfax, VA, USA
Abstract :
Specifications for the development of a knowledge-based environment (SHEDIO) for VLSI system architectural design are discussed. The SHEDIO environment is a multilevel frame that evaluates and optimizes the topology of the components that compose a digital system by examining a predefined set of algorithms, which the system must execute efficiently. The SHEDIO environment attempts to minimize the length of the connections among the system components, and at the same time, minimize the occupied chip area by optimizing the placement of the system components
Keywords :
VLSI; circuit layout CAD; computer architecture; expert systems; minimisation; network topology; SHEDIO environment; VLSI system architectural design; algorithms; connection length minimization; digital system; knowledge-based environment; multilevel frame; occupied chip area; system components placement; topology optimization; Algorithm design and analysis; Circuits; Digital systems; Environmental economics; Machine vision; Packaging; Shape; Simulated annealing; Topology; Very large scale integration;
Conference_Titel :
Languages for Automation: Symbiotic and Intelligent Robots, 1988., IEEE Workshop on
Conference_Location :
College Park, MD
Print_ISBN :
0-8186-0890-0
DOI :
10.1109/LFA.1988.24975