Design Exploration of a Spurious Power Suppression Technique (SPST) and Its Applications

This paper presents the design exploration and application of a technique to suppress the spurious power dissipation existed in the data-paths for multimedia VLSI designs. The proposed technique adopts the design concept of separating the arithmetic units into most significant part (MSP) and least significant part (LSP), and then freezing the MSP whenever this part of circuits does not affect the computation result. This paper first explores three implementation approaches of realizing the SPST-based design concept to decide the most efficient one, and then uses this approach to reduce the spurious power of the multi-transform coding design in H.264 systems. The post-layout simulations show that the proposed SPST can save average 27.38% of power dissipation of the multi-transform design