On-demand Pipelining for Improving Energy-Awareness

Clock gating is a well-known technique to reduce the clock pulses when a pipelined data path does not reach its peak throughput. This paper presents an on-demand pipelining scheme to further eliminate all redundant clock transitions, where the synchronization elements (i.e. registers or latches) are activated only when necessary. In our experiments with the UMC 0.18mum CMOS technology, the proposed approach saves up to 61% energy dissipation on conventional pipelines and 13% of those with gating clocks only. In contrast with the constant energy dissipation of the conventional clock gating approach, our on-demand pipelining consumes less and less energy as the allowed computation cycles increase for a given task. In other words, the proposed scheme has better energy awareness over varying throughput requirements