Title :
A consistent model for the wiring delay of the MOS inverter
Author :
Marinov, C.A. ; Neittaanmäki, P. ; Hara, V.
Author_Institution :
Polytech. Inst., Bucharest, Romania
Abstract :
The authors deal with this problem associated to the simplest enhancement mode n-MOS inverter, connected through a line L to a load modelled by a capacitor C. For strictly positive characteristic constants r, c, g of the line the authors derived certain qualitative properties of the ∈-modified model of the MOS inverter connected to a capacitive load through a distributed parameter element. These properties validate using the proposed model in the study of the influence of the interconnection line on the delay time of the MOS inverter
Keywords :
MOS integrated circuits; VLSI; circuit CAD; integrated logic circuits; logic gates; MOS inverter; capacitive load; delay time; distributed parameter element; enhancement mode n-MOS inverter; interconnection line; propagation delay time; wiring delay;
Conference_Titel :
Circuit Theory and Design, 1989., European Conference on
Conference_Location :
Brighton