Differential pass-transistor logic partial-product generator for iterative multipliers

A reconfigurable iterative multiplier-accumulator (IMAC) that confines all configuration-dependent logic functionality to the partial-product generator (PPG) has been presented. Software generated standard cell, composite logic gate, and differential pass-transistor logic (DPTL) circuits were considered for the PPG implementation. It was found that for this arithmetic application DPTL had significant advantages in terms of area and expansibility when compared to the other circuit styles. The result is an IMAC that can be easily reconfigured using automated techniques, effectively providing flexibility in choosing the area and speed tradeoff best suited to the application