A VLSI implementation of multidimensional digital signal processing

This paper proposes a new technique for mapping multidimensional signal processing onto VLSI array structures. The resulting structures possess a high degree of regularity, modularity and parallelism. Moreover, the recursivity and linear expansion of the structures make the mapping technique suitable for higher scale integrations (ULSI and WSI). In general, the proposed technique can decompose a general multidimensional real rational transfer function in terms of one-dimensional low-order transfer functions. The implementation of a core cell within a test multiplier is described. In addition, a design of a high speed two-dimensional non-recursive digital filter is reported