DocumentCode
273931
Title
Very high precision analog trimming using floating gate MOSFETS
Author
Sweeney, J. ; Geiger, R.
Author_Institution
Motorola Adv. Products Res. & Dev. Lab., Phoenix, AZ, USA
fYear
1989
fDate
5-8 Sep 1989
Firstpage
652
Lastpage
655
Abstract
The addition of a floating gate MOS transistor option to basic CMOS or BiMOS processes is becoming recognized as a viable option with improvements in thin gate technology and the practical acceptance of increased process complexity. The use of the devices as infinite resolution nonvolatile storage devices and as precision analog trim elements are discussed. Experimental results focusing on the programming resolution and time-stability of the charge retention are presented
Keywords
BIMOS integrated circuits; CMOS integrated circuits; MOS integrated circuits; insulated gate field effect transistors; linear integrated circuits; semiconductor storage; charge retention; dynamic programming scheme; floating gate MOSFETS; high precision analog trimming; periodic refreshing; programming resolution; time-stability;
fLanguage
English
Publisher
iet
Conference_Titel
Circuit Theory and Design, 1989., European Conference on
Conference_Location
Brighton
Type
conf
Filename
51701
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