DocumentCode
2739796
Title
Error-Power Tradeoffs in QCA Design
Author
Srivastava, Saket ; Sarkar, Sudeep ; Bhanja, Sanjukta
Author_Institution
Electr. Eng., Univ. of South Florida, Tampa, FL
fYear
2008
fDate
18-21 Aug. 2008
Firstpage
530
Lastpage
533
Abstract
In this work we present an error-power tradeoff study in a Quantum-dot Cellular Automata (QCA) circuit design. Device parameter variation to optimize performance is a very crucial step in the development of a technology. In this work we vary the maximum kink energy of a QCA circuit to perform an error-power tradeoff study in QCA design. We make use of graphical probabilistic models to estimate polarization errors and non-adiabatic energy dissipated in a clocked QCA circuit and demonstrate the tradeoff studies on the basic QCA circuits such as majority gate and inverter. We also show how this study can be used by comparing two single bit adder designs. The study will be of great use to designers and fabrication scientists to choose the most optimum size and spacing of QCA cells to fabricate QCA logic designs.
Keywords
cellular automata; logic design; quantum computing; quantum dots; quantum well devices; QCA circuit design; QCA logic design; clocked QCA circuit; error-power tradeoffs; graphical probabilistic model; maximum kink energy; nonadiabatic energy dissipation; polarization errors; quantum-dot cellular automata; Circuit synthesis; Clocks; Computer errors; Fabrication; Inverters; Polarization; Power dissipation; Quantum cellular automata; Quantum dots; Stationary state;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanotechnology, 2008. NANO '08. 8th IEEE Conference on
Conference_Location
Arlington, TX
Print_ISBN
978-1-4244-2103-9
Electronic_ISBN
978-1-4244-2104-6
Type
conf
DOI
10.1109/NANO.2008.158
Filename
4617140
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