DocumentCode
2740442
Title
Embedding of Chips for System in Package realization - Technology and Applications
Author
Boettcher, Lars ; Manessis, Dionysios ; Ostmann, Andreas ; Karaszkiewicz, Stefan ; Reichl, Herbert
Author_Institution
Fraunhofer Inst. for Reliability & Microintegration, Berlin
fYear
2008
fDate
22-24 Oct. 2008
Firstpage
383
Lastpage
386
Abstract
In this paper the realization of packages and system-in-packages (SIP) with embedded components will be described. Embedding of semiconductor chips into substrates has several advantages. It allows a very high degree of miniaturization due to the possibility of sequentially stacking of multiple layers containing embedded components. A further advantage is the beneficial electrical performance by short and geometrically well controlled interconnects. In addition the embedding gives a homogeneous mechanical environment of the chips, resulting in good reliability. As a result of the increasing interest in implementing embedding technologies in an industrial environment a newly established European project "HERMES" will focus mainly on industrial adaptation of embedding technologies with an additional scope of furthering also the existing technological capabilities at prototype level. The goal is to realize a new integrated manufacturing concept to offer low cost solutions for high density electronic systems. New manufacturing and technological challenges arise from the industrialization of component embedding technologies. The new process should combine PCB (printed circuit board) technology and die assembly in one production process in order to benefit the most from large-area processing and high-density packaging.
Keywords
chip scale packaging; integrated circuit manufacture; integrated circuit reliability; microassembling; polymers; printed circuits; semiconductor device manufacture; semiconductor device packaging; system-in-package; HERMES project; PCB; chip in polymer technology; component embedding technology; die assembly; high density electronic systems; high-density packaging; integrated manufacturing concept; large-area processing; printed circuit board technology; production process; reliability; semiconductor chip embedding technology; system in package; Components, packaging, and manufacturing technology; Costs; Electrical equipment industry; Integrated circuit interconnections; Integrated circuit technology; Manufacturing industries; Prototypes; Semiconductor device packaging; Stacking; Substrates; 3D packaging; Chip in Polymer; System in Package; embedded chips;
fLanguage
English
Publisher
ieee
Conference_Titel
Microsystems, Packaging, Assembly & Circuits Technology Conference, 2008. IMPACT 2008. 3rd International
Conference_Location
Taipei
Print_ISBN
978-1-4244-3623-1
Electronic_ISBN
978-1-4244-3624-8
Type
conf
DOI
10.1109/IMPACT.2008.4783892
Filename
4783892
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