DocumentCode :
2740651
Title :
Physical analysis of the high-temperature subthreshold slope in SOI MOSFETs
Author :
Rudenko, T. ; Kilchytska, V. ; Colinge, J.P. ; Flandre, B.
Author_Institution :
Inst. of Semicond. Phys., NAS of Ukraine, Kyiv, Ukraine
fYear :
2000
fDate :
2000
Firstpage :
34
Lastpage :
35
Abstract :
Conventional bulk silicon CMOS circuits can operate only at moderate temperatures (up to 150-200°C). At higher temperatures, bulk silicon CMOS devices usually fail because of increased junction leakage, thermally induced latchup, and threshold voltage shift. Thanks to the high-temperature advantages of SOI MOSFETs, the range of SOI CMOS operation can be extended up to 300°C (Francis et al, 1992; Flandre et al, 1993; Eggermont et al, 1996). To better understand device behavior, it is necessary to reconsider the physics of the SOI MOSFET at high temperatures. In this work, we revise the validity of the classical expression for the subthreshold swing and analyze the physics behind the temperature degradation of the subthreshold slope in both thick- and thin-film SOI MOSFETs
Keywords :
MOSFET; high-temperature techniques; leakage currents; semiconductor device measurement; silicon-on-insulator; thermal analysis; 150 to 200 C; 300 C; SOI CMOS operation; SOI MOSFET physics; SOI MOSFETs; Si-SiO2; bulk silicon CMOS circuits; bulk silicon CMOS device failure; device behavior; high-temperature subthreshold slope; junction leakage; moderate temperature operation; physical analysis; subthreshold swing; thermally induced latchup; thick-film SOI MOSFETs; thin-film SOI MOSFETs; threshold voltage shift; Capacitance; Doping; MOSFETs; Microelectronics; Physics computing; Semiconductor films; Silicon; Temperature dependence; Thin film devices; Transistors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, 2000 IEEE International
Conference_Location :
Wakefield, MA
ISSN :
1078-621X
Print_ISBN :
0-7803-6389-2
Type :
conf
DOI :
10.1109/SOI.2000.892756
Filename :
892756
Link To Document :
بازگشت