• DocumentCode
    2740896
  • Title

    Single-Electron Arithmetic Circuits for Sigma-Delta Domain Signal Processing

  • Author

    Katao, Tsubasa ; Suzuki, Yoshinao ; Fujisaka, Hisato ; Kamio, Takeshi ; Ahn, Chang-Jun ; Haeiwa, Kazuhisa

  • Author_Institution
    Fac. of Inf. Sci., Hiroshima City Univ., Hiroshima
  • fYear
    2008
  • fDate
    18-21 Aug. 2008
  • Firstpage
    729
  • Lastpage
    732
  • Abstract
    This paper presents single-electron arithmetic circuits for sigma-delta domain signal processing. Sigma-delta domain signal processing is one of hardware architectures which have tolerance for transient device errors. Results of circuit simulation show that the errors never trigger out-of-control state of the circuits and random surge of their outputs.
  • Keywords
    circuit simulation; logic circuits; logic simulation; sigma-delta modulation; circuit simulation; hardware architecture; out-of-control state; random surge; sigma-delta domain signal processing; single-electron arithmetic circuits; transient device error tolerance; Arithmetic; Circuit simulation; Clocks; Delta-sigma modulation; Digital modulation; Digital signal processors; Error correction; Hardware; Signal processing; Surges;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Nanotechnology, 2008. NANO '08. 8th IEEE Conference on
  • Conference_Location
    Arlington, TX
  • Print_ISBN
    978-1-4244-2103-9
  • Electronic_ISBN
    978-1-4244-2104-6
  • Type

    conf

  • DOI
    10.1109/NANO.2008.219
  • Filename
    4617201
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2740896