Practical difficulties to design real-time learning VLSI neural circuits

Summary form only given. Design requirements for a self-learning VLSI chip were examined, and problems associated with adding the learning function to a pulse-code architecture and a fully analog architecture were compared. Experimental results for printed English character recognition show that the learning process requires a more than 13-bit synapse accuracy and the retrieving process requires only a 5-bit to 6-bit synapse accuracy. In multilayer neural network applications with a backpropagation algorithm, separated VLSI realization of learning and retrieving functions seems to be appropriate for current silicon technologies