DocumentCode :
2742459
Title :
A 1.5ns, 64kb ECL-CMOS SRAM
Author :
Nambu, H. ; Kanetani, K. ; Idei, Y. ; Yamaguchi, K. ; Homma, N. ; Hiramoto, T. ; Tamba, N. ; Odaka, M. ; Watanabe, K. ; Ikeda, T. ; Ohhata, K. ; Sakurai, Y.
Author_Institution :
Hitachi Ltd.
fYear :
1991
fDate :
May 30 1991-June 1 1991
Firstpage :
11
Lastpage :
12
Keywords :
BiCMOS integrated circuits; Bipolar transistors; Delay effects; Driver circuits; Laboratories; Parasitic capacitance; Random access memory; Read-write memory; Switches; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Circuits, 1991. Digest of Technical Papers. 1991 Symposium on
Conference_Location :
Oiso, Japan
Type :
conf
DOI :
10.1109/VLSIC.1991.760054
Filename :
760054
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2742459
