• DocumentCode
    2742898
  • Title

    Cell-Plate Line Connecting Complementary Bitline (c/sup 3/) Architecture For Battery Operating DRAMs

  • Author

    Asakura, M. ; Arimoto, K. ; Hidaka, H. ; Fujishima, Kenzaburo

  • Author_Institution
    Mitsubishi Electric Corp.
  • fYear
    1991
  • fDate
    May 30 1991-June 1 1991
  • Firstpage
    59
  • Lastpage
    60
  • Keywords
    Batteries; Capacitors; Joining processes; Laboratories; Large scale integration; Power supplies; Random access memory; Research and development; Signal to noise ratio; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Circuits, 1991. Digest of Technical Papers. 1991 Symposium on
  • Conference_Location
    Oiso, Japan
  • Type

    conf

  • DOI
    10.1109/VLSIC.1991.760077
  • Filename
    760077
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2742898