Combining de-stressing and self repair for long-term dependable systems

Reliability issues concerning integrated systems based on nano-electronic devices have been a matter of research for years. Early focus was on transient fault effects due to particle radiation and failing interconnects due to thermal stress and metal migration. More recently, transistor parameter deterioration due to permanent input voltages at MOS transistor gates has been investigated. One potential cure to the problem is extra circuitry that is kept in redundancy for eventual purposes of self-repair. This circuitry, however, may also be used to redistribute activities among several basic blocks for a minimization of stress effects. The paper describes an architecture that can perform de-stressing and self repair in combination and describes costs and limitations.