Title :
Consideration Of Poly-SI Loaded Cell Capacity Limits For Each Of Low-power And High-speed SRAM´s
Author :
Kato, H. ; Sato, K. ; Matsui, M. ; Shibata, H. ; Hashimoto, K. ; Ohtani, T. ; Ochii, K.
Author_Institution :
ULSI Research Center
fDate :
May 30 1991-June 1 1991
Keywords :
Laboratories; Leakage current; Maintenance engineering; P-n junctions; Power engineering and energy; Random access memory; Resistors; Threshold voltage; Ultra large scale integration; Variable structure systems;
Conference_Titel :
VLSI Circuits, 1991. Digest of Technical Papers. 1991 Symposium on
Conference_Location :
Oiso, Japan
DOI :
10.1109/VLSIC.1991.760094
