Title :
FANHAT: fanout oriented hierarchical automatic test generation system
Author :
Min, H.B. ; Rogers, W.A. ; Luh, H.-T.A.
Author_Institution :
Comput. Eng. Res. Center, Texas Univ., Austin, TX, USA
Abstract :
FANHAT, has been designed and implemented to accelerate test generation for digital circuits. FANHAT uses a minimal hierarchical representation of the circuit and functional level heuristics to perform implication, propagation, and backtracking with high-level functional model. Experiments with three circuits show hierarchical test generation using FANHAT is 1.5 to 8.9 times faster than flat gate-level test generation.<>
Keywords :
digital integrated circuits; integrated circuit testing; logic testing; FANHAT; backtracking; digital circuits; fanout oriented hierarchical automatic test generation system; flat gate-level test generation; functional level heuristics; high-level functional model; implication; minimal hierarchical representation; propagation; Automatic test pattern generation; Automatic testing; Circuit faults; Circuit testing; Combinational circuits; Costs; Decoding; Design engineering; System testing; Tree graphs;
Conference_Titel :
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-1986-4
DOI :
10.1109/ICCAD.1989.76993
