DocumentCode
274324
Title
Constrained floorplan design for flexible blocks
Author
Dong, S.-k. ; Cong, J. ; Liu, C.L.
Author_Institution
Dept. of Comput. Sci., Illinois Univ., Urbana, IL, USA
fYear
1989
fDate
5-9 Nov. 1989
Firstpage
488
Lastpage
491
Abstract
The authors propose a simple and fast iterative improvement algorithm for solving the constrained floorplan design problem. The algorithm allows users to specify an aspect ratio for the bounding rectangle and constraints on the relative positions and separation requirements of blocks. In the first phase of the algorithm, two scaling factors for each flexible block are computed for adjusting the block dimensions iteratively. In the second phase, blocks are placed according to the constraint graphs. If no overlaps are detected, the algorithm stops; otherwise an edge is inserted into one of the constraint graphs to resolve the overlap between one pair of blocks. The algorithm then goes back to the first phase. Experimental results show that this algorithm tends to achieve the prespecified overall aspect ratio and produces floorplans with small overall area.<>
Keywords
VLSI; circuit layout CAD; iterative methods; aspect ratio; block dimensions; bounding rectangle; constrained floorplan design; constraint graphs; flexible block; iterative improvement algorithm; relative positions; scaling factors; separation requirements; Algorithm design and analysis; Computer science; Contracts; Design methodology; Linear approximation; Logic; Quadratic programming; Routing; Simulated annealing; Wire;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location
Santa Clara, CA, USA
Print_ISBN
0-8186-1986-4
Type
conf
DOI
10.1109/ICCAD.1989.76997
Filename
76997
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