Title :
Fail-soft Circuit Design In A Cache Memory Control LSI
Author :
Ooi, Y. ; Kashimura, M. ; Takeuchi, H. ; Kawamura, E.
Author_Institution :
NEC Corporation
fDate :
May 30 1991-June 1 1991
Keywords :
Cache memory; Circuit faults; Circuit synthesis; Degradation; Delay effects; Detectors; Electrical fault detection; Fault tolerance; Large scale integration; Registers;
Conference_Titel :
VLSI Circuits, 1991. Digest of Technical Papers. 1991 Symposium on
Conference_Location :
Oiso, Japan
DOI :
10.1109/VLSIC.1991.760099
