Title :
Fault detection in a testable PLA with low overhead for production testing
Author :
Shen, Y.-N. ; Lombardi, F.
Author_Institution :
Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
Abstract :
A testable structure is presented for programmable logic arrays (PLAs) which is amenable to production testing. A low overhead structure is proposed to keep the kill area at the lowest value. This is achieved by using a single additional input line to the original PLA. Fault detection is based on a specific set of conditions which must be satisfied in the characteristic matrix and structure of the minimized PLA. The characteristics of the vectors in the test set are discussed. A two-phase test is used to supplement the basic test vector if the specified constraint in the minimized PLA structure is not met. Hardware overhead is lower than any other method found in the technical literature.<>
Keywords :
automatic testing; integrated circuit testing; logic arrays; logic testing; BIST; design for testability; kill area; low hardware overhead; minimized PLA; production testing; programmable logic arrays; test set; test vector; testable PLA; two-phase test; Circuit faults; Circuit testing; Fault detection; Hardware; Logic arrays; Logic testing; Manufacturing; Production; Programmable logic arrays; Very large scale integration;
Conference_Titel :
Computer-Aided Design, 1989. ICCAD-89. Digest of Technical Papers., 1989 IEEE International Conference on
Conference_Location :
Santa Clara, CA, USA
Print_ISBN :
0-8186-1986-4
DOI :
10.1109/ICCAD.1989.77014
