• DocumentCode
    2747287
  • Title

    Development of evaluation approach for delamination considering micro-scale interfacial layer structure between resin and silicon

  • Author

    Matsumoto, Tsubasa ; Yu, Qiang ; Shibutani, Tadahiro ; Matsuzaki, Tomio

  • Author_Institution
    Dept. of Mech. Eng. & Mater. Sci., Yokohama Nat. Univ., Yokohama
  • fYear
    2008
  • fDate
    22-24 Oct. 2008
  • Firstpage
    289
  • Lastpage
    292
  • Abstract
    Interconnect technology is the key to the reliability of electronic devices. Electronic components are soldered to a printed circuit board (PCB). Major failure mode is thermal fatigue of solder joints since there is a big difference in the coefficient of thermal expansion (CTE) between soldered components. Underfill resin is used to improve the interconnect reliability. Resin can relief stresses in solder joints due to the mismatch in CTE. On the other side, resin creates another reliability concern to interfacial failures of metal/resin and ceramic/resin. Interfacial failure has been often evaluated as the fracture toughness based on fracture mechanics, where the interface is assumed as the boundary of components and has a perfect bonding. Then, the stress intensity factor is a key parameter to evaluate the interfacial strength. However, in the case of electronic devices, since there are a lot of new materials and since new combination of materials has a different interfacial strength, another methodology of estimating the interfacial strength is being required. Actually, the interface such as resin/ceramics has an imperfect bonding and consists of small structures. In this study, an alternative approach for evaluating the interfacial strength of resin in electronic components was proposed. Based on the scanning electron microscopy (SEM) observation, finite element models were constructed. The models consist of two components and interfacial layer. Parametric FEA study revealed that stresses are affected by small structures of the interface layer. It means that small structure should be considered to estimate an interfacial strength. Experiments were carried out to verify the proposed approach. 3-point bending test was performed for a specimen consisting of a silicon chip, an epoxy resin and a FR-4 substrate. Delaminaiton load was measured as interfacial strength. FEA of the 3-point bending test was also performed to estimate the critical load for delamination. Pro- - posed approach agrees with experimental results.
  • Keywords
    delamination; elemental semiconductors; finite element analysis; fracture toughness; integrated circuit interconnections; internal stresses; reliability; resins; scanning electron microscopy; silicon; thermal expansion; SEM; Si; delamination; finite element models; fracture mechanics; fracture toughness; interconnect technology; interfacial failure; interfacial strength; microscale interfacial layer structure; reliability; resin; scanning electron microscopy; silicon; stress intensity factor; thermal expansion coefficient; Bonding; Ceramics; Delamination; Electronic components; Integrated circuit interconnections; Resins; Silicon; Soldering; Stress; Thermal expansion;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Materials and Packaging, 2008. EMAP 2008. International Conference on
  • Conference_Location
    Taipei
  • Print_ISBN
    978-1-4244-3620-0
  • Electronic_ISBN
    978-1-4244-3621-7
  • Type

    conf

  • DOI
    10.1109/EMAP.2008.4784285
  • Filename
    4784285