FRAM based TMR (triple modular redundancy) for fault tolerance implementation

The main objective of this paper is to design a Triple modular redundancy test bench using FRAM (Ferroelectric RAM) based memory module for main driver of OBDH (On Board Data Handling) system of LEO (Lower Earth Orbit) Satellite that enables the fast detection of error in driver data when implied with FPGA (Field Programmable Gate Array) and provides more realistic and tolerant way of fault finding for Single Event Upset (SEU) in highly radiated space environment. The scope of paper embraces development of TMR test bench, software algorithms, functional simulations, timing simulations and conclusion of comparison of FRAM based memory module with EEPROM and Flash Memories.