Title :
Hardware verification: ternary algebra versus a hybrid method
Author_Institution :
Dept. of Comput. Sci., New Orleans Univ., LA, USA
Abstract :
Two different methods, based on ternary algebra and a hybrid method, are considered to detect hazards in combinational logic designs. Problems raised by the first technique are solved by using the second approach, and a time complexity improvement is shown. An improvement over other techniques is shown. In particular, the time complexity and the completeness of the approach are shown
Keywords :
combinatorial circuits; hazards and race conditions; logic testing; combinational logic designs; completeness; hazards; hybrid method; ternary algebra; time complexity improvement; Algebra; Circuit simulation; Combinational circuits; Hardware; Hazards; Input variables; Lattices; Logic design; Logic functions; Sequential circuits;
Conference_Titel :
Circuits and Systems, 1989., Proceedings of the 32nd Midwest Symposium on
Conference_Location :
Champaign, IL
DOI :
10.1109/MWSCAS.1989.101852
