DocumentCode :
2749004
Title :
Theta /sub JC/ characterization of chip packages-justification, limitations, and future
Author :
Bar-Cohen, A. ; Elperin, T. ; Eliasi, R.
Author_Institution :
Control Data Corp., Minneapolis, MN, USA
fYear :
1989
fDate :
7-9 Feb. 1989
Firstpage :
1
Lastpage :
4
Abstract :
A discussion is presented of thermal figures-of-merit (FOMs) for chip package thermal resistance, for use in evaluating competing thermal designs, and analysis techniques, for use in determining operating temperature profiles. The junction-to-case thermal resistance, Theta /sub JC/, as well as the junction-to-fluid thermal resistance, have been used in both of these roles for first-level packaging. The use of a modified Theta /sub JC/ is proposed. Experimental data indicate that the relations developed are capable not only of accurately describing the chip temperature for a variety of thermal management strategies, but also of highlighting the impact of specific thermal design features.<>
Keywords :
heat sinks; packaging; thermal resistance; chip package thermal resistance; first-level packaging; heat sinks; junction-to-case thermal resistance; junction-to-fluid thermal resistance; operating temperature profiles; thermal designs; thermal figures-of-merit; thermal management; CMOS logic circuits; Electronic packaging thermal management; Electronics packaging; Integrated circuit interconnections; Integrated circuit packaging; Temperature; Thermal conductivity; Thermal engineering; Thermal management; Thermal resistance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Semiconductor Thermal and Temperature Measurement Symposium, 1989. SEMI-THERM V., Fifth Annual IEEE
Conference_Location :
San Diego, CA, USA
Type :
conf
DOI :
10.1109/STHERM.1989.76056
Filename :
76056
Link To Document :
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