Title :
Single chip implementation of a robust coder at 4.8 kbps
Author :
Asjadi, G.H. ; Kondoz, A.M. ; Evans, B.G.
Author_Institution :
Surrey Univ., Guildford, UK
Abstract :
Reports on the implementation of a new coding scheme, base-band code excited linear predictive coding (CELPC-BB), which combines base-band coding, Multipulse excitation coding (MPLPC) and CELPC coding schemes. This scheme will not only reduce the computational complexity significantly but also improves the quality achievable by MPLPC and CELPC coders. The authors report on the single chip implementation of a 4.8 kbps CELPC-BB coder using the recently available AT&T DSP32C processor on a single eurocard board. The board will provide a full duplex link and only consumes less than 500 mA of current at 5 volts. All the features of the board, as well as the computational complexity and memory usage of the coder, are discussed. The performance of the coder is demonstrated by playing a tape recorded in real-time, with and without channel errors, confirming the fact that the coding scheme is capable of tolerating random errors of up to 2%, with no additional FEC bits
Keywords :
codecs; digital signal processing chips; speech analysis and processing; vocoders; 4.8 kbit/s; 5 V; 500 mA; AT&T DSP32C processor; base-band code excited linear predictive coding; coder; computational complexity; eurocard board; full duplex link; memory usage; random errors; single chip implementation; speech coding; vocoders;
Conference_Titel :
Mobile Radio and Personal Communications, 1989., Fifth International Conference on
Conference_Location :
Coventry