Title :
Testing in the fourth dimension
Author :
Agrawal, Vishwani D.
Author_Institution :
Lucent Technols. Bell Labs., Murray Hill, NJ, USA
Abstract :
Digital testing in the last three decades has taught us the value of design for testability (DFT). Disciplines such as scan and built-in self-test (BIST) have emerged as standard practices because they allow logic testing of arbitrarily large systems. This has been one of the greatest achievements in testing thus far. These past decades have also produced significant advances in semiconductor technology, which make extremely fine features and larger scales of integration possible. The beginning of the new millennium is an era of the system-on-a-chip (SOC). Today´s specialized SOCs will soon become large-volume production chips and there will lie our testing challenge of the new millennium
Keywords :
automatic test equipment; automatic testing; built-in self test; design for testability; integrated circuit testing; logic testing; BIST; DFT; built-in self-test; design for testability; digital testing; fourth dimension; large-volume production chips; logic testing; semiconductor technology; system-on-a-chip; Built-in self-test; Circuit testing; Clocks; Design for testability; Electronic equipment testing; Logic testing; System testing; System-on-a-chip; Timing; USA Councils;
Conference_Titel :
Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian
Conference_Location :
Taipei
Print_ISBN :
0-7695-0887-1
DOI :
10.1109/ATS.2000.893589