DocumentCode :
2751994
Title :
Ground bounce reduction in power gating circuits using input vector control
Author :
Sun, Yu ; Xiao, Liyi ; Liu, Yuan
Author_Institution :
Microelectron. Center, Harbin Inst. of Technol., Harbin, China
fYear :
2010
fDate :
July 28 2010-Aug. 1 2010
Firstpage :
345
Lastpage :
348
Abstract :
Power gating is one of the most effective ways to reduce leakage power by shutting off the idle blocks in a system-on-a-chip. However, a current surge occurs when the gated blocks wake up from sleep mode, causing voltage fluctuations on the power rails, which is called ground bounce effect. In this paper, input vector control method is used to reduce the ground bounce. Genetic algorithm is applied to generate the proper input vector. Simulation results show that by selecting input vector properly, the maximum voltage fluctuation induced by ground bounce can be reduced by 28% at most on the benchmark circuits.
Keywords :
clocks; fluctuations; genetic algorithms; system-on-chip; benchmark circuits; current surge; genetic algorithm; ground bounce reduction; input vector control; leakage power reduction; power gating circuits; power rails; sleep mode; system-on-a-chip; voltage fluctuations; Benchmark testing; Delay; Fluctuations; Integrated circuit modeling; Logic gates; Optimization; Voltage fluctuations; genetic algorithm; ground bounce; input vector control; power gating;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Laser Physics and Laser Technologies (RCSLPLT) and 2010 Academic Symposium on Optoelectronics Technology (ASOT), 2010 10th Russian-Chinese Symposium on
Conference_Location :
Harbin
Print_ISBN :
978-1-4244-5511-9
Type :
conf
DOI :
10.1109/RCSLPLT.2010.5615310
Filename :
5615310
Link To Document :
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