Title :
An experimental analysis of spot defects in SRAMs: realistic fault models and tests
Author :
Hamdioui, Said ; Van de Goor, Ad J.
Author_Institution :
Intel Corp., Santa Clara, CA, USA
Abstract :
In this paper a complete analysis of spot defects in industrial SRAMs will be presented. All possible defects are simulated, and the resulting electrical faults are transformed into functional fault models. The existence of the usually used theoretical memory fault models will be verified and new ones will be presented. Finally, a new march test detecting all realistic faults, with a test length of 14n, will be introduced, and its fault coverage is compared with other known tests
Keywords :
SRAM chips; integrated circuit testing; SRAMs; fault coverage; fault models; functional fault models; spot defects; Bridge circuits; Circuit faults; Circuit testing; Costs; Electrical fault detection; Random access memory; Resistors; SPICE; System testing; Variable structure systems;
Conference_Titel :
Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian
Conference_Location :
Taipei
Print_ISBN :
0-7695-0887-1
DOI :
10.1109/ATS.2000.893615
