A DFT methodology for detecting bridging faults in reversible logic circuits

Toffoli gate is a universal reversible logic gate by which any classical or quantum circuit can be synthesized. In this paper, we propose a design-for-test (DFT) method to make an arbitrary reversible logic circuit composed of n-bit Toffoli gates fully testable for single intra-level bridging faults and single stuck-at faults. We have considered testing of circuits composed of n-bit Toffoli gates. The proposed method requires exactly ([log₂N] +3) test vectors, for ´N´ input wires, which is independent of the number of gates in the circuit. We also give a universal test set for detecting these faults.