Title :
Impact of memory cell array bridges on the faulty behavior in embedded DRAMs
Author :
AL-Ars, Zaid ; Van de Goor, Ad J.
Author_Institution :
Fac. of Inf. Technol. & Syst., Delft Univ. of Technol., Netherlands
Abstract :
Establishing functional faults, based on defect injection and circuit simulation, has become an important method in understanding faulty memory behavior and in improving memory tests. In this paper this approach is used to study the effects of bridges on the faulty behavior of embedded DRAM (eDRAM) devices. The paper applies the new approach of fault primitives to perform this analysis. The analysis shows the existence of previously defined memory fault models, and (re)establishes new ones. The paper also investigates the concept of dynamic faulty behavior and establishes its importance for memory devices
Keywords :
circuit simulation; fault simulation; integrated memory circuits; random-access storage; dynamic RAM; dynamic faulty behavior; embedded DRAMs; fault primitives; faulty behavior; functional faults; memory cell array bridges; memory fault models; memory tests; Analytical models; Bridge circuits; Circuit faults; Circuit simulation; Circuit testing; DRAM chips; Information technology; Performance analysis; Random access memory; System testing;
Conference_Titel :
Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian
Conference_Location :
Taipei
Print_ISBN :
0-7695-0887-1
DOI :
10.1109/ATS.2000.893638
