Title :
An efficient parallel transparent diagnostic BIST
Author :
Huang, D.C. ; Jone, W.B.
Author_Institution :
Dept. of CS&IE, Nat. Chung-Cheng Univ., Taiwan
Abstract :
In this paper, we propose a new transparent Built-in Self-Diagnosis (BISD) method to diagnose multiple embedded memory arrays with various sizes in parallel. A new transparent diagnostic interface has been proposed to perform testing in normal mode. By tolerating redundant read/write/shift operations, we develop a new march algorithm called TDiagRSMarch to achieve the goals of low hardware overhead, lower test time, and high test coverage. Experimental results demonstrate that the diagnostic efficiency of TDiagRSMarch is independent of memory topology, defect-type distribution, and degree of parallelism
Keywords :
VLSI; automatic testing; built-in self test; fault diagnosis; integrated circuit testing; integrated memory circuits; logic testing; parallel algorithms; TDiagRSMarch algorithm; built-in self-diagnosis method; diagnostic efficiency; low hardware overhead; march algorithm; multiple embedded memory arrays; parallel transparent diagnostic BIST; redundant read/write/shift operations; test coverage; test time reduction; transparent diagnostic interface; Automatic testing; Built-in self-test; Fabrication; Fault diagnosis; Hardware; Performance evaluation; Routing; Test pattern generators; Very large scale integration;
Conference_Titel :
Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian
Conference_Location :
Taipei
Print_ISBN :
0-7695-0887-1
DOI :
10.1109/ATS.2000.893640
