Title :
High speed IDDQ test and its testability for process variation
Author :
Hashizume, Masaki ; Yotsuyanagi, Hiroyuki ; Ichimiya, Masahiro ; Tamesada, Takeomi ; Takeda, Masashi
Author_Institution :
Fac. of Eng., Tokushima Univ., Japan
Abstract :
A new high speed IDDQ test method is proposed. It is based on charge current for load capacitances of gates whose output logic values are changed from L to H by test input vector application. In this paper, the testability of the test method is examined for some process variations generated in CMOS IC production
Keywords :
CMOS logic circuits; integrated circuit testing; logic testing; production testing; CMOS IC production; charge current; gate load capacitances; high speed IDDQ test; process variation; test input vector application; testability; CMOS integrated circuits; CMOS logic circuits; Capacitance; Circuit faults; Circuit testing; Current measurement; Current supplies; Integrated circuit testing; Logic gates; Logic testing;
Conference_Titel :
Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian
Conference_Location :
Taipei
Print_ISBN :
0-7695-0887-1
DOI :
10.1109/ATS.2000.893647
