Title :
Fault tolerant multistage interconnection networks with widely dispersed paths
Author :
Kamiura, Naotake ; Kodera, Takashi ; Matsui, Nobuyuki
Author_Institution :
Dept. of Comput. Eng., Himeji Inst. of Technol., Hyogo, Japan
Abstract :
As a sort of MINs (Multistage Interconnection Networks), we propose the 2-dilated baseline network whose performance in the faulty case degrades as gracefully as possible. All the available paths established between an input terminal and an output one via an identical input of SE (Switching Element) in some stage never pass through an identical SE in the next stage. The loads on SEs, therefore, are shared efficiently. Extra links added to enhance the performance never complicate the routing scheme. There is no difference between our MIN and other ones in hardware overhead. Besides our MIN is superior to other ones in performance, especially in robustness against concentrated SE faults in an identical stage
Keywords :
fault tolerant computing; multistage interconnection networks; 2-dilated baseline network; concentrated SE faults; fault tolerant MIN; multiprocessor interconnection network; multistage interconnection networks; switching element; widely dispersed paths; Computer networks; Degradation; Fault tolerance; Hardware; Joining processes; Multiprocessor interconnection networks; Parallel processing; Robustness; Routing; Switches;
Conference_Titel :
Test Symposium, 2000. (ATS 2000). Proceedings of the Ninth Asian
Conference_Location :
Taipei
Print_ISBN :
0-7695-0887-1
DOI :
10.1109/ATS.2000.893660