Title :
Analysis of Resistive Bridging Defects in a Synchronizer
Author :
Kim, Hyoung-Kook ; Jone, Wen-Ben ; Wang, Laung-Terng ; Wu, Shianling
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Cincinnati, Cincinnati, OH, USA
Abstract :
This paper presents fault modeling and analysis for resistive bridging defects in a synchronizer constructed with two D flip-flops. Bridging defects are exhaustively injected into any two nodes of the synchronizer to find all possible faults that might occur in the synchronizer, and HSPICE is used to perform circuit analysis.
Keywords :
fault simulation; flip-flops; synchronisation; D flip-flops; HSPICE; circuit analysis; fault modeling; resistive bridging defects; synchronizer; Circuit faults; Circuit testing; Clocks; Flip-flops; Frequency synchronization; Inverters; Metastasis; Predictive models; Timing; Voltage; fault analysis; fault modeling; resistive bridging defect; synchronizer;
Conference_Titel :
Asian Test Symposium, 2009. ATS '09.
Conference_Location :
Taichung
Print_ISBN :
978-0-7695-3864-8
DOI :
10.1109/ATS.2009.13
