DocumentCode
275359
Title
An analytical approach to floorplan design and optimization
Author
Sutanthavibul, Suphachai ; Shragowitz, Eugene ; Rosen, J. Ben
Author_Institution
Dept. of Comput. Sci., Minnesota Univ., Minneapolis, MN, USA
fYear
1990
fDate
24-28 Jun 1990
Firstpage
187
Lastpage
192
Abstract
An analytical method for VLSI general floorplan design and optimization is proposed. This method is based on a mixed integer programming model and all application of a standard mathematical software. The method allows arbitrary combinations of rigid and flexible modules. Various objective functions, such as chip area, interconnection length, timing delays or any combinations of them, are permitted. Routing space is estimated by the global router. Experimental data are provided
Keywords
VLSI; circuit layout CAD; integer programming; VLSI floorplan design; VLSI floorplan optimisation; chip area; flexible modules; global router; interconnection length; mathematical software; mixed integer programming model; objective functions; rigid modules; routing space; timing delays; Algorithm design and analysis; Application software; Computer science; Design optimization; Iterative algorithms; Linear programming; Mathematical model; Shape; Timing; Topology;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE
Conference_Location
Orlando, FL
ISSN
0738-100X
Print_ISBN
0-89791-363-9
Type
conf
DOI
10.1109/DAC.1990.114852
Filename
114852
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