DocumentCode
2753696
Title
Strategies for reconfiguring hypercubes under faults
Author
Banerjee, P.
Author_Institution
Coordinated Sci. Lab., Illinois Univ., Urbana, IL, USA
fYear
1990
fDate
26-28 June 1990
Firstpage
210
Lastpage
217
Abstract
The design of two reconfiguration strategies for hypercube multicomputer architectures under failures is discussed. The first scheme uses spare processors attached to certain processors in the hypercube by means of a novel embedding technique. The second approach places spare processors between specific links in the hypercube. Both schemes involve the mapping of logical links of a virtual hypercube onto a set of physical links in the final reconfigured hypercube and hence suffer some performance degradation.<>
Keywords
computer architecture; fault tolerant computing; multiprocessing systems; embedding technique; faults; logical links; multicomputer architectures; performance degradation; physical links; reconfiguring hypercubes; Circuit faults; Computer architecture; Contracts; Degradation; Delay; Fault tolerant systems; Hardware; Hypercubes; Routing; Switches;
fLanguage
English
Publisher
ieee
Conference_Titel
Fault-Tolerant Computing, 1990. FTCS-20. Digest of Papers., 20th International Symposium
Conference_Location
Newcastle Upon Tyne, UK
Print_ISBN
0-8186-2051-X
Type
conf
DOI
10.1109/FTCS.1990.89368
Filename
89368
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