NASFLOW, a simulation tool for silicon technology development

Author

Forsythe, D.D. ; Agarwal, Atul P. ; Yeh, Cliune-Sin ; Aronowitz, Sheldon ; Gadepally, B.

Author_Institution

Nat. Semicond. Corp., Santa Clara, CA, USA

fYear

1990

fDate

24-28 Jun 1990

Firstpage

333

Lastpage

337

Abstract

A simulation system is described for linking two-dimensional simulators for process and device to a parameter extraction programs for the purpose of generating artificial parameters for the circuit analysis program, NASPICE. A key feature of the system is that it operates under the control of a shell program which offers a simple and easy interface to the user. Results of an initial development using the program sequence SUPRA=>PISCES=>CADPET=>NASPICE are described. Good correlation was obtained between system-generated drain characteristics and silicon for both N- and P-channel MOS transistors, and similarly for CMOS DC transfer characteristics

Keywords

circuit analysis computing; insulated gate field effect transistors; CADPET; CMOS DC transfer characteristics; MOS transistors; NASFLOW; NASPICE; PISCES; SUPRA; artificial parameters; circuit analysis program; parameter extraction programs; shell program; silicon technology development; simulation tool; system-generated drain characteristics; two-dimensional simulators; Analytical models; Circuit simulation; Circuit synthesis; Computational modeling; Electrical products industry; Fabrication; Joining processes; Predictive models; SPICE; Silicon;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE

Conference_Location

Orlando, FL

ISSN

0738-100X

Print_ISBN

0-89791-363-9

Type

conf

DOI

10.1109/DAC.1990.114876

Filename

114876