DocumentCode
275387
Title
Percolation based synthesis
Author
Potasman, Roni ; Lis, Joseph ; Nicolau, Alexandru ; Gajski, Daniel
Author_Institution
Dept. of Electr. & Comput. Eng., California Univ., Irvine, CA, USA
fYear
1990
fDate
24-28 Jun 1990
Firstpage
444
Lastpage
449
Abstract
A new approach called percolation-based synthesis for the scheduling phase of high-level synthesis (HLS) is presented. Some new techniques are discussed for compaction of flow graphs beyond basic block limits, which can produce order-of-magnitude speedups versus serial execution. The presented algorithm applies to programs with conditional jumps, loops, and multicycle pipelined operations. In order to schedule under resource constraints, one starts by first finding the optimal schedule (without constraints) and then adds heuristics to map the optimal schedule onto the given system. It is argued that starting from an optimal schedule is one of the most important factors in scheduling because it offers the user flexibility to tune the heuristics and gives a good bound for the resource-constrained schedule. This scheduling algorithm is integrated with a synthesis tool which uses VHDL as input description and produces a structural netlist of generic register-transfer components and a unit-based control table as output
Keywords
circuit CAD; scheduling; VHDL; circuit CAD; compaction; flow graphs; generic register-transfer components; heuristics; high-level synthesis; jumps; loops; multicycle pipelined operations; percolation-based synthesis; resource-constrained schedule; scheduling phase; Compaction; Computer science; Flow graphs; High level synthesis; Instruments; Optimal scheduling; Parallel processing; Processor scheduling; Scheduling algorithm; Uninterruptible power systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE
Conference_Location
Orlando, FL
ISSN
0738-100X
Print_ISBN
0-89791-363-9
Type
conf
DOI
10.1109/DAC.1990.114897
Filename
114897
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