DocumentCode :
2753896
Title :
Fault diagnosis in scan-based BIST
Author :
Rajski, Janusz ; Tyszer, Jerzy
Author_Institution :
Mentor Graphics Corp., Wilsonville, OR, USA
fYear :
1997
fDate :
1-6 Nov 1997
Firstpage :
894
Lastpage :
902
Abstract :
The paper presents a new fault diagnosis technique for scan-based BIST designs. It can be used for non-adaptive identification of the scan cells that are driven by erroneous signals, irrespective of the error multiplicity. The proposed scheme employs a simple scan cell selection hardware which in conjunction with a conventional signature analysis allows flexible tradeoffs between the test application time and the diagnostic resolution
Keywords :
boundary scan testing; built-in self test; fault diagnosis; logic testing; diagnostic resolution; erroneous signals; error multiplicity; fault diagnosis; nonadaptive identification; scan cell selection hardware; scan cells; scan-based BIST; signature analysis; test application time; Built-in self-test; Circuit faults; Circuit testing; Failure analysis; Fault diagnosis; Hardware; Logic testing; Printed circuits; Registers; Sequential analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Conference, 1997. Proceedings., International
Conference_Location :
Washington, DC
ISSN :
1089-3539
Print_ISBN :
0-7803-4209-7
Type :
conf
DOI :
10.1109/TEST.1997.639704
Filename :
639704
Link To Document :
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