A global, dynamic register allocation and binding for a data path synthesis system

A new algorithm is developed for efficient register allocation and binding in data path synthesis. The algorithm determines both the number of registers and the mapping from variables to registers simultaneously during data path allocation so that the cost, i.e. area, of the registers and connections to/from the registers can be minimized. The algorithm selects the best registers for each input and/or output variable of operations. This register allocation/binding algorithm is used with a data path allocation algorithm that exploits the tradeoff among all kinds of hardware elements. Experimental results of the algorithm are presented