• DocumentCode
    275409
  • Title

    The influences of fault type and topology on fault model performance and the implications to test and testable design

  • Author

    Butler, Kenneth M. ; Mercer, M. Ray

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Texas Univ., Austin, TX, USA
  • fYear
    1990
  • fDate
    24-28 Jun 1990
  • Firstpage
    673
  • Lastpage
    678
  • Abstract
    A new method, difference propagation, is proposed to analyze fault models in combinational circuits. It propagates Boolean functional information represented by ordered binary decision diagrams. Results are presented concerning exact detectabilities and syndromes for a set of benchmark circuits. The data suggest answers to open questions in CAD and represent the first data of this type for bridging faults. The information is shown to affect testable design, as well as test generation
  • Keywords
    combinatorial circuits; logic testing; Boolean functional information; benchmark circuits; bridging faults; combinational circuits; difference propagation; fault models; fault type; test generation; testable design; topology; Benchmark testing; Circuit faults; Circuit simulation; Circuit testing; Computational modeling; Design automation; Design engineering; Integrated circuit testing; Logic testing; Topology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 1990. Proceedings., 27th ACM/IEEE
  • Conference_Location
    Orlando, FL
  • ISSN
    0738-100X
  • Print_ISBN
    0-89791-363-9
  • Type

    conf

  • DOI
    10.1109/DAC.1990.114938
  • Filename
    114938