Title :
Zero aliasing compression
Author :
Gupta, Sandeep K. ; Pradhan, Dhiraj K. ; Reddy, Sudhakar M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Massachusetts Univ., Amherst, MA, USA
Abstract :
A compression technique, called periodic quotient compression, which eliminates the problem of aliasing is presented. The compression in signature analysis is based on polynomial division, where the remainder is the signature and the quotient is discarded. With this technique one looks at both the remainder and the quotient and assumes that the good circuit response is known a-priory during the design of the linear feedback shift register (LFSR). The concept of periodic polynomials is used to completely characterize the quotient, thus eliminating aliasing. The maximum number of bits required to compress an N-b response to achieve zero aliasing is determined. The authors provide an algorithm for constructing an LFSR to achieve this bound for any given circuit under test.<>
Keywords :
built-in self test; data compression; feedback; logic testing; polynomials; shift registers; N-b response; built-in self testing; linear feedback shift register; periodic polynomials; periodic quotient compression; polynomial division; signature analysis; zero aliasing compression technique; Automatic testing; Built-in self-test; Circuit faults; Circuit testing; Cities and towns; Compressors; DH-HEMTs; Hardware; Information analysis; Polynomials;
Conference_Titel :
Fault-Tolerant Computing, 1990. FTCS-20. Digest of Papers., 20th International Symposium
Conference_Location :
Newcastle Upon Tyne, UK
Print_ISBN :
0-8186-2051-X
DOI :
10.1109/FTCS.1990.89373